Pre-IEDM Seminars at Stanford

Topic: 
Pre-IEDM Seminars at Stanford
Friday, December 1, 2017 - 1:00pm to 5:35pm
Venue: 
Allen Annex 338X
Abstract / Description: 

Time

Topic

Speaker

Affiliation

1:00 pm – 1:05 pm

Introduction

H.-S. Philip Wong

Stanford

1:05 pm – 1:35 pm

Reliability of hexagonal boron nitride dielectric stacks for CMOS applications

Mario Lanza

Soochow University

1:35 pm – 2:05 pm

An overview on TSMC and Semiconductor Technology Trends

Carlos Diaz

TSMC

2:05 pm – 2:35 pm

From Novel Devices to New Computational Models

Suman Datta

Notre Dame University

2:35 pm – 3:05 pm

Computing with Dynamical Systems

Arijit Raychowdhury

Georgia Tech.

3:05 pm – 3:20 pm

Break

 

 

3:20 pm – 3:50 pm

CMOS Logic Scaling Beyond FinFETs: A Device Architecture Perspective

Huiming Bu

IBM

3:50 pm – 4:20 pm

A High Performance and Ultra Low Power FinFET Technology for Mobile and RF Applications

Ben Sell

Intel

4:20 pm – 4:35 pm

Break

 

 

4:35 pm – 5:05 pm

Carbon nanotube electronics: towards fundamental limits and large-scale integration

Lian-Mao Peng

Peking University

5:05 pm – 5:35 pm

Technology boosters for improved energy efficiency in CMOS and Beyond CMOS

Adrian Ionescu

EPFL

Mario Lanza
Mario Lanza is a Young 1000 Talent professor at the Institute of Functional Nano & Soft Materials of Soochow University, the fastest growing university in the world in 2015-2016 according to Nature Index. Dr. Lanza got his PhD in Electronics in 2010 at Universitat Autonoma de Barcelona. During the PhD he was a visiting scholar at The University of Manchester (UK) and Infineon Technologies (Germany). In 2010-2011 he did a postdoc at Peking University, and in 2012-2013 he was a Marie Curie fellow at Stanford University. Dr. Lanza has published over 80 papers, including Science and Advanced Materials, edited an entire book for Wiley-VCH and registered four patents (one of them received 1M$ investment). He is member of the advisory board of Scientific Reports (Nature) and Crystal Research and Technology (Wiley-VCH), and member of the technical committee of several international conferences. Dr. Lanza is the winner of the 2017 Microelectronic Engineering Young Investigator Award given by Elsevier. His research interests focus on the improvement of electronic devices using 2D materials, with special emphasis on 2D (layered) dielectrics and logic memory devices.

Carlos H. Diaz
Dr. Carlos H. Diaz received B.S. in EE and Physics and M.S. degree in EE from Universidad de Los Andes, Bogota-Colombia, and Ph.D. degree in EE from University of Illinois at Urbana-Champaign. He is Senior Director of Advanced Technology Research in R&D, Taiwan Semiconductor Manufacturing Company. Prior to joining TSMC in 1998, he was a member of the technical staff at Hewlett-Packard Co.

He has published over 100 journal and conference papers, holds over 30 US patents, and published one book. He served in the IEEE IEDM Technical and Executive Committees and the technical program committees for the IEEE VLSI, SSDM, SISPAD, IRPS, and EOS/ESD international conferences / symposiums. He also served at the International Roadmap for Semiconductors executive committee. Dr. Diaz was elected an IEEE Fellow in 2008 for his contributions to deep-submicron foundry technology. In 2011, he was co-recipient of Annual Innovation Breakthrough Award, Ministry of Economic Affairs, Taiwan R.O.C., conferred to TSMC's 28nm logic technology: Dr. Y.J. Mii and Dr. Burn J. Lin(process integration and process technology leaders), and Dr. Carlos H. Diaz (device engineering leader). He received the 2016 IEEE Andrew Grove Award for sustained contributions to and leadership in foundry advanced CMOS logic technology.

Suman Datta
Suman Datta is the Frank M. Freimann Chair Professor of Engineering at the University of Notre Dame. Prior to that he was a Professor at The Penn State University in Electrical Engineering from 2007 to 2011. From 1999 till 2007, he was in the Advanced Transistor Group at Intel Corporation, where he developed several generations of logic transistor technologies including high-k/metal gate, Tri-gate and non-silicon channel CMOS transistor technologies. He works on novel emerging device concepts that support new computational models. He was a recipient of the Intel Achievement Award (2003), the Intel Logic Technology Quality Award (2002), the Penn State Engineering Alumni Association (PSEAS) Outstanding Research Award (2012), the SEMI Award for North America (2012), IEEE Device Research Conference Best Paper Award (2010, 2011) and the PSEAS Premier Research Award (2015).  He is Fellow of IEEE and Fellow of National Academy of Inventors (NAI). He has published over 275 journal and refereed conference papers and holds 170 patents related to advanced device technologies.

Arijit Raychowdhury
Arijit Raychowdhury is an Associate Professor in the School of Electrical and Computer Engineering at the Georgia Institute of Technology where he joined in January, 2013. He currently holds the ON Semiconductor Jr Professorship and is the Associate Director of the Center for Co-Design of Chips, Packaging and Systems. He received his Ph.D. degree in Electrical and Computer Engineering from Purdue University. Prior to joining academia, he was a staff scientist at Intel's Circuit Research Labs for five years where he worked on mixed-signal and digital designs for energy-efficiency sensors and compute nodes. Before that, he spent one and a half years at Texas Instruments where he worked on developing the world’s first adaptive echo cancellation unit for DSL modems, which received the EDN industrial design award. Dr. Raychowdhury holds more than 25 U.S. and international patents and has published over 150 articles in journals and refereed conferences. He and his students have won multiple best paper awards, fellowships and best thesis awards.

Huiming Bu
Huiming Bu has more than 12 years of industry experience of semiconductor logic device R&D at IBM Research after he received his Ph.D. in Electrical Engineering from Yale University. In his current role, Huiming is responsible for CMOS device technology roadmap for IBM and he oversees Semiconductor Research on new device architectures and new materials for logic scaling. Huiming started his technical career at IBM on High-k/Metal Gate project and then drove SOI FinFET research for IBM’s 14nm technology. After that, he worked on 10nm and 7nm technology nodes in Joint Development Alliance (JDA) with various partners - aka “IBM club”. Huiming has authored and co-authored more than 60 publications, and holds more than 50 US and international patents.

Lian-Mao Peng
Lian-Mao Peng received his B.S. in Physical Electronics from Peking University in 1982 and his Ph.D in Physics from Arizona State University in 1988, and spent the following six years working at the University of Oxford. He returned to China in 1995, first as a senior research scientist at the Institute of Physics, Chinese Academy of Sciences, and then jointed the faculty of the Peking University and became the Yangzi Professor of Nanoscale Science and Technology in 1999, Director of the Key Laboratory for the Physics and Chemistry of Nanodevices in 2004,Head of the Department of Electronics in 2007, and Director of the Center for Carbon based Nanoelectronics in 2015. His current research focuses on carbon-based high performance electronic and optoelectronic devices, and nanostructured photoelectrode materials and solar cells.

He has published 389 research papers (www.researcherid.com/rid/E-2089-2011, citation: 13935), and a book entitled “High-energy electron diffraction and microscopy” (1994, Oxford University). He is a Fellow of the Institute of Physics, UK and an Associate Editor for the Journal of Applied Physics. He received numerous awards, including 1990 IFSEM Presidential Scholar Award; 1998 Qiu Shi Prize for Outstanding Young Scientist; 2009 Lin Zhao Qian Award, Chinese Electron Microscopy Society; 2011 Top 10 Science Advances, China; The 2011 State National Science Award, for “Studies on the fundamentals of quantitative electron microscopy and nanostructured titanium oxide”; and The 2016 State National Science Award, for project on “Electronic devices based on carbon-based nano materials”.

Adrian M. Ionescu
Adrian M. Ionescu is a Professor and Director of the Nanoelectronic Devices Laboratory at Ecole Polytechnique Fédérale de Lausanne (EPFL), Switzerland. He served as Director of the Doctoral Program in Microsystems and Microelectronics of EPFL. His group pioneered new concepts in beyond CMOS devices and technologies. He is the recipient of the IBM Faculty Award 2013 and of the André Blondel Medal 2009 of the Society of Electrical and Electronics Engineering, Paris, France. He is an IEEE Fellow and a member of the Swiss Academy of Sciences (SATW). In 2016 he was awarded an Advanced European Research Council Grant to develop energy efficient millivolt transistors and sensors for Internet-of-Things.