Enabling Real-time AI with Wafer Scale Architecture

Abstract / Description: 

In the last several years, new advanced techniques in AI have created a new level of artificial intelligence. Techniques such as reasoning, agents, and other inference-time methods are now behind all stat-of-the-art AI applications. However, although the intelligence has substantially increased, the additional compute demand results in substantially slower user experience. As a result, traditionally, these advanced AI techniques cannot be used in real-time AI applications. In this talk, I will show how the Cerebras wafer-scale architecture changes the paradigm of what's possible in real-time AI.  The architecture integrates unprecedented levels of compute, memory, and interconnect on a single wafer-scale chip. So even the most advanced AI can run with real-time performance enabling new applications and use cases not possible before. 

Bio: 

Sean Lie is Co-Founder and CTO at Cerebras Systems. He is a computer architect specializing in hardware/software co-design and machine learning. He has also worked on a variety of technologies including transactional memory, high performance CPUs, networking, storage, and large-scale distributed clusters. Sean received his BS and MEng from MIT.