The future of nanoelectronics: not only scaling…

Abstract:

The continuous reduction trend of the electronic devices’ sizes over the past several decades has supported the growing demands for improved performance as well as for increasing multifunctionality within a small form -factor - as anticipated by Gordon Moore in 1965 [1]. However, as we go forward, the continued focus on scaling down device sizes will be accompanied by a renewed focus on system -level co-optimization, where alternative solutions to von Neumann architectures will greatly benefit from the choice of appropriate primitives and devices- not necessarily CMOS and not necessarily using extremely scaled features. In fact, the fundamental inadequacy of conventional computing architectures for problems relevant to autonomous systems such as decision -making and combinatorial optimizations, leads to extended solution times and staggering energy consumption. Solving large instances of those problems may become impractical, no matter how advanced the single logic and memory components.

Large optimization problems are considered intractable in nature but are essential and complementary to AI in many autonomous systems. First, we will discuss how we could solve large -input combinatorial problems in a scalable fashion taking advantage of magnetic tunnel junctions using MRAM devices with an in-memory compute approach [2], and how this method could also be extended to simultaneously support inference at the edge [3].

Second, we will discuss how 2D materials - nowadays a large class of only a few atoms -thin materials - could on the one hand further extend the downscaling trajectory of electronic devices, but also, inherently support compact multifunctional nanosystems.

After a preamble about the use of transition metal dichalcogenides for advanced FETs, we will explore some exciting applications of graphene as a multifunctional, dynamically tunable semimetal.

The harnessing of graphene’s properties on silicon wafers, despite inherent challenges, can deliver a broad range of miniaturized and reconfigurable functionalities to complement CMOS technologies in a system with the smallest form-factor. Over the past decade, my academic group pioneered an epitaxial graphene on silicon carbide on silicon technology able to fill this gap, in addition, unlocking unique functionalities for MEMS/NEMS, nano-optics and metasurfaces thanks to the specific combination of graphene with silicon carbide [4]. This platform allows to realize any complex graphene nanopattern in a site – selective fashion, at the wafer -scale and with sufficient adhesion for subsequent integration. We will review the fundamental hallmarks of this technology and some of its most promising applications in areas as diverse as integrated energy storage [5], reconfigurable MIR metasurfaces [6], and electrodes for electro-encephalography for brain-computer interfaces [7].

[1] G.Moore, Electronics, Volume 38, Number 8, April 19, 1965 [2] S.Yoo et al., proceedings of DAC 2025, arXiv preprint arXiv:2504.13294

[3] A.Holla et al., arXiv preprint arXiv:2512.23212, accepted in npj Unconventional Computing, Jan 2026

[4] B.Cunning et al, Nanotechnology 25 (32), 325301, 2014; E.Romero et al., Physical Review Applied 13 (4), 044007, 2020 ; P.Rufangura e al, Journal of Physics: Materials 3 (3), 032005, 2020 ; D.Katzmarek et al, Nanotechnology 34 (40), 405302, 2023 [5] M.Amjadipour, et al., Batteries & Supercaps 3 (10), 587-595, 2020 [6] P.Rufangura et al, APL Photonics 10 (8), 2025 [7] S.Faisal et al, J. Neural Eng. 18 (6), 066035, 2021 ; S.Faisal et al, ACS Appl. Nano Mater. 6 (7), 5440-5447, 2023.

Bio:

Francesca Iacopi is an IEEE and MRS Fellow with over 20 years’ industrial and academic expertise in semiconductor technologies spanning interconnects, devices and packaging. Her focus is the translation of basic scientific advances in nanomaterials and novel device concepts into implementable integrated technologies. She is known for her seminal work on the integration of porous dielectrics in on-chip interconnects while at imec, and for the invention of the alloy -mediated epitaxial graphene platform on SiC on silicon wafers during her academic tenure. She was recipient of an MRS Gold Graduate Student Award (2003), an Australian Research Council Future Fellowship (2012), a Global Innovation Award in Washington DC (2014) and was listed among the most innovative engineers by Engineers Australia (2018).  Francesca regularly serves on technical and strategic committees for IEEE and the Materials Research Society. She is an Elected Member to the IEEE EDS Board of Governors (2021, 2024) and serves on the Editorial Advisory Board for ACS Applied Nanomaterials and the IEEE The Institute magazine. She is also the inaugural Editor-in-Chief of the IEEE Trans. on Materials for Electron Devices. In 2024, she left her full professorship at the University of Technology Sydney to rejoin imec as the inaugural Director of the Imec Indiana R&D Center based at Purdue University, IN, USA.