How Technologies are Enabling AI

Abstract: 

Artificial Intelligence (AI) foundations were formulated almost 100 years ago but consumers did not become aware of it until Chat GPT reached in two months the 100 million users in November 2022. Since then, AI has become the talk of the day, and its progress is occurring at lighting speed. All of this progress has been made possible by the readily availability of a multitude of technologies that were developed in the past 30 years for completely different applications; but they have nowadays become completely suitable and essential to empowering AI. How these technologies were developed in the past, how they are presently enabling AI and their future trends will be presented.

Bio:

Dr. Gargini received a doctorate in Electrical Engineering in 1970 and a doctorate in Physics in 1975 both with full marks and honors. In the 70s he was a researcher at Stanford University and at Fairchild Camera and Instrument in Palo Alto. In 1980, Dr. Gargini was appointed as the first manager of MPU technology at Intel (80286 and 80386). In 1985 he headed the first submicron team at Intel.  In 1992 he led the team that developed and made manufacturable the Flip Chip packaging technology that is still widely used nowadays. In 1996, he became Director of Technology Strategy and responsible for worldwide consortia research until 2012 when he retired from Intel.  During his tenure at Intel, he was a member of Sematech, SRC, EIDEC, ASET and SIA Boards, Chairman of the I300I consortium and NRI. He was one of the initiators of the EUVLLC. He is presently co-chairman of the EUVL Symposium.  Dr. Gargini contributed to the formation of IMEC core partners program and became the chairman of its scientific advisory board. Dr. Gargini led the industry-wide conversion to 300mm wafers as Chairman of the I300I multi-national consortium, under his guidance fully automated semiconductor wafer handling was developed, standardized and adopted world-wide. From 1998 to 2015, Dr. Gargini was Chairman of the ITRS sponsored by the WSC.  In 2016 he became Chairman of the IRDS sponsored by IEEE Computer Society with the support of 8 IEEE Societies and Councils (i.e., CSC, EDS, CASS, Magnetics, Signal Processing, Pels, CEDA and SSCS) and with full membership participation of Europe (SiNANO) and Japan (SDRJ).

Dr. Gargini was inducted in the VLSI Research Hall of Fame in 2009, IEEE Fellow in 2009, I-JSAP Fellow in 2014 and IEEE Life-Fellow in 2020.