2017 Headlights Workshop on Advances in Computing Architecture

Advances in Computing Architecture
Tuesday, April 11, 2017 (All day)
Allen Extension Building: 101X Auditorium
Abstract / Description: 

The computing world faces a perplexing but exciting challenge.  On one hand, we see the continued deceleration of Moore’s Law economics and scaling for conventional semiconductor devices threatening the familiar innovation cycle of faster, cheaper and cooler systems.  On the other hand, new computation models, a tsunami of bigger, better data, progress on deep learning methods, advances in parallel architectures, and more intelligent “things" are poised to revolutionize software, systems and underlying hardware platforms dramatically and perhaps quickly.  

This workshop will focus on three themes, related to the scaling of computing to meet the opportunity: 

  • scaling of both devices and cloud to create deeper insights from bigger data,
  • scaling of efficiency in energy, memory and cost to enable ubiquitous autonomous devices and cloud,
  • development of new models of computation that exploit advances in machine learning, application-derived architecture insights and higher levels of representation.

We open the workshop with a keynote address from Prof. John Hennessy, one of the most influential researchers in computer architecture of the last forty years, speaking on "The End of Road for General Purpose Processors and the Future of Computing”.  The workshop will include talks from both the leading research teams at Stanford and from technical leaders in industry.  Likely invited talks include assessment of the computation impact of 5G wireless, technical demands of autonomous driving, and new ideas in cloud and device CPU architectures and programming models.  Likely Stanford talks include

  • a new search engine for scaling up classification and data explanation,
  • breakthrough formal methods for verification of neural networks,
  • using domain-specific languages to build improved systems,
  • rethinking hardware for machine learning and data analytics.

The day will conclude with a lively panel discussion with key speakers and the workshop participants.  The whole workshop is expected to be highly interactive, with ample opportunities to explore the implications of key ideas and technology trends, and to help mold the SystemX  research perspective on important initiatives in computing and design.

Please contact us for more information.

Technical Program
9:00 Welcome Rick Bahr/ Dr. Chris Rowen
9:15 Keynote: The End of Road for General Purpose Processors and the Future of Computing Prof. John Hennessy (Stanford) NA
Session: Scaling Devices & Cloud Systems for Bigger Data
Chair: Dr. Chris Rowen
10:15 From Embedded to Scalable: Challenges in the Development of Scalable Real Time System Dr. Alan Gatherer (Huawei) NA
10:45 Memory Hierarchy for Web Search Grant Ayers (Stanford) NA

MacroBase: An Analytics Engine for Prioritizing Attention in Fast Data

Prof. Peter Bailis (Stanford) NA
Session: Scaling Efficiency
Chair: Rick Bahr
1:00 Spatial: a Language for Programming Configurable Accelerators Prof. Kunle Olukotun (Stanford) NA

Silicon Photonics for 2.5D Interposers: Chip-Level Optical Communication for Manycore Processors

Yvain Thonnart (CEA LETI) NA
2:00 Heterogeneous Integration of Nano-scale Fabrics: 1D, 2D and 3D Prof. Eric Pop (Stanford) NA
Session: New Computation Models
Chair: TBD
3:00 Deep Learning Computing Needs for Autonomous Cars: Benchmarking and Optimizing Unmesh Bordoloi (General Motors) NA
3:30 Snorkel: Ameliorating the Labeling Bottleneck in Machine Learning

Prof. Chris Ré (Stanford)


Scaling ARM from One to One Trillion Cores

Eric Van Hensbergen (ARM)    NA


Algorithms vs Architectures: Where's the big leverage in the deep learning era? (Moderator: Chris Ré; Panelists: Marc Duranton (CEA LETI), Unmesh Bordoloi, Eric Van Hensbergen)