2017 Headlights Workshop on Advances in Computing Architecture

Topic: 
Advances in Computing Architecture
Tuesday, April 11, 2017 (All day)
Venue: 
Allen Extension Building: 101X Auditorium
Speaker: 
Various
Abstract / Description: 

The computing world faces a perplexing but exciting challenge.  On one hand, we see the continued deceleration of Moore’s Law economics and scaling for conventional semiconductor devices threatening the familiar innovation cycle of faster, cheaper and cooler systems.  On the other hand, new computation models, a tsunami of bigger, better data, progress on deep learning methods, advances in parallel architectures, and more intelligent “things" are poised to revolutionize software, systems and underlying hardware platforms dramatically and perhaps quickly.  

This workshop focused on three themes, related to the scaling of computing to meet the opportunity: 

  • scaling of both devices and cloud to create deeper insights from bigger data,
  • scaling of efficiency in energy, memory and cost to enable ubiquitous autonomous devices and cloud,
  • development of new models of computation that exploit advances in machine learning, application-derived architecture insights and higher levels of representation.

 


Technical Program
9:00 Welcome Rick Bahr/ Chris Rowen
9:15 Keynote: The End of Road for General Purpose Processors and the Future of Computing Prof. John Hennessy (Stanford) Member Content: PDF
Session: Scaling Devices & Cloud Systems for Bigger Data
Chair: Dr. Chris Rowen
10:15 From Embedded to Scalable: Challenges in the Development of Scalable Real Time System Alan Gatherer (Huawei) Member Content: PDF
10:45 Memory Hierarchy for Web Search Grant Ayers (Stanford) NA
11:15

MacroBase: An Analytics Engine for Prioritizing Attention in Fast Data

Prof. Peter Bailis (Stanford) Member Content: PDF
Session: Scaling Efficiency
Chair: Rick Bahr
1:00 Spatial: a Language for Programming Configurable Accelerators Prof. Kunle Olukotun (Stanford) Member Content: PDF
1:30

Silicon Photonics for 2.5D Interposers: Chip-Level Optical Communication for Manycore Processors

Yvain Thonnart (CEA-Leti) Member Content: PDF
2:00 Heterogeneous Integration of Nano-scale Fabrics: 1D, 2D and 3D Prof. Eric Pop (Stanford) Member Content: PDF
Session: New Computation Platforms and Models
Chair: Prof. Subhasish Mitra (Stanford)
3:00 Deep Learning Computing Needs for Autonomous Cars: Benchmarking and Optimizing Unmesh Bordoloi (General Motors) Member Content: PDF
3:30 Scaling Deep Learning to Thousands of Machines

Ioannis Mitliagkas (Stanford PostDoc)

Member Content: PDF
4:00

Scaling ARM from One to One Trillion Cores

Eric Van Hensbergen (ARM)    Member Content: PDF
4:45

Panel

Algorithms vs Architectures: Where's the big leverage in the deep learning era? (Moderator: Prof. Kunle Olukotun; Panelists: Marc Duranton (CEA LETI), Unmesh Bordoloi, Eric Van Hensbergen, Prof. John Hennessy)