External Presentations: Semiconductor Technology: A System Perspective

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Topic: 
External Presentations: Semiconductor Technology: A System Perspective
Monday, July 20, 2020 - 9:20am to Tuesday, July 21, 2020 - 9:55am
Venue: 
Design Automation Conference 2020
Speaker: 
Prof. Philip Wong - Electrical Engineering - Stanford University
Abstract / Description: 

Conference link: http://www2.dac.com/events/eventdetails.aspx?id=295-151

Future electronic systems will continue to rely on, and increasingly benefit from, the advances in semiconductor technology as they have had for more than five decades. Since its inception, the semiconductor industry has used a physical dimension (minimum gate length of a transistor) as a means to gauge continuous technology advancement. This metric is all but obsolete today. Density is what drives the benefits of new device technologies for computation – the primary application driver for semiconductors. Going forward, we will use a three-prong metric that consists of logic density (DL), memory bit density (DM), and interconnect density between logic and memory (DC) as a means to capture how advances in semiconductor device technologies enable system level benefits. Because DL and DM will increase at a slower rate than the historical trends, technologies that address the connectivity will become primary drivers for technology advancement. This trend is already visible in HPC products that progressively leverage more capable packaging technologies including 3D chip stacking. Indeed, vertical interconnect density associated with advanced packaging featured about three orders of magnitude improvement in the last decade alone. Scaling vertical interconnect pitch to sub-100 nm would enable another four orders of magnitude improvement. As such, there is plenty of room for system-level advances based on 3D ICs. The distinction between on-die connectivity (vias and on-chip interconnect wires) and off-chip connectivity (e.g. TSVs and micro-bumps) will become increasingly blurred. Wafer-level monolithic integration technologies and packaging technologies will smoothly blend into one another. New design tools that optimally perform system partitioning will become indispensable.