A Compelling approach for low power low voltage design in Deep SubMicron

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A Compelling approach for low power low voltage design in Deep SubMicron
Thursday, March 12, 2015 - 4:00pm to Friday, March 13, 2015 - 4:55pm
Packard Room 202
Pete Foley, Wave Semiconductor
Abstract / Description: 

This talk explores issues with existing logic design methodologies that hamper robustness, power minimization, and performance (speed) maximization.  We then propose an alternative methodology which mitigates most of these issues. We then discuss how the proposed alternative methodology can form the basis of superior very low power and/or very high performance systems, and briefly describe the programmable platform under development at Wave Semiconductor using the alternate proposed methodology.


Pete Foley received a BSEE from Rice, and an MSCS from Berkeley where he worked on the SOAR (Smalltalk On A RISC) team under Dave Patterson. He then spent 7 years at Apple doing ASIC design and system architecture, first as part of the original Mac team, and later as one of the first members of the Newton team. He then worked at a number of startup companies including SuperMac Technology, Chromatic Research, and as a founder and CEO of nBand Communications.  Along the way he had a brief tenure at Benchmark Capital as an Entrepreneur in Residence, where he created a startup focused on home networking over twisted pair. Most recently Pete was an Executive in Residence at Tallwood Venture Capital, where Wave Semiconductor was incubated.  He spun Wave out of Tallwood as a founder and CEO in early 2010.

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