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The reasons why state-of-the-art vertical bipolar circuits dissipate very high power are explained. The merits of SOI symmetric lateral bipolar transistors as a high-speed low-power technology are discussed. SOI lateral bipolar is CMOS-compatible, scalable like CMOS, and arguably much lower cost than CMOS. It not only enables traditional bipolar circuits to run fast at much reduced power, it invites us to totally rethink bipolar. The exciting potentials of SOI lateral bipolar for a wide range of system applications are discussed, including high-performance, ultra-low-power, and THz electronics.
Tak H. Ning received his Ph. D. degree in physics from the University of Illinois at Urbana- Champaign in 1971. He joined IBM Thomas J. Watson Research Center in 1973. Currently, he is an IBM Fellow. His technical interests and contributions include CMOS, bipolar, DRAM, EEPROM and SOI. He is a member of the U.S. National Academy of Engineering, and a fellow of the IEEE and of the American Physical Society.
