FD-SOI Technology, Advantages for Analog/RF and Mixed-Signal Designs

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Topic: 
FD-SOI Technology, Advantages for Analog/RF and Mixed-Signal Designs
Thursday, October 13, 2016 - 4:30pm to 5:30pm
Venue: 
Allen Extension Building, 101X Auditorium
Speaker: 
Dr. Andreia Cathelin, Sr Member of the Technical Staff, STMicroelectronics
Abstract / Description: 

Fully Depleted Silicon on Insulator (FD-SOI) is one of the alternatives that permits today to follow the Moore's law of CMOS integration for the 28nm node and beyond, while still dealing with fully planar transistors. Numerous presentations have presented over the several last years the benefits of this technology for an energy efficient integration of digital signal processing cores. This talk will focus on the benefits of FD-SOI technology for analog/RF/millimeter-wave and high-speed mixed signal circuits, by taking full advantage of wide voltage range body biasing tuning. For each category of circuits (analog/RF, mmW and high-speed), concrete design examples are given in order to highlight the main design features specific to FD-SOI.

 

Bio: 

Andreia Cathelin started her electronic studies at the Polytechnic Institute of Bucarest, Romania and graduated from the Institut Supérieur d’Electronique du Nord (ISEN), Lille, France in 1994. In 1998 and 2013 respectively, she received PhD and “habilitation à diriger des recherches” (French highest academic degree) from the Université de Lille 1, France.

Since 1998, she has been with STMicroelectronics, Crolles, France, now in Embedded Processing Solutions Segment, Technology R&D, as Senior Member of the Technical Staff. Her major fields of interest are in the area of RF/mmW/THz systems for communications and imaging.

Andreia is serving in several IEEE conferences and committees. She has been active at ISSCC since 2011: in 2011 as TPC member, RF sub-committee chair from 2012 to 2015, and is Forums Chair and member of the Executive Committee for ISSCC2017.  She is member of several Technical Program Committees: VLSI Symposium on Circuits since 2010 – currently serving as officer and ESSCIRC since 2005. Since September 2013, Andreia is on the Steering committee of ESSCIRC-ESSDERC conferences, currently serving as Chair. She has authored or co-authored 100 technical papers and 4 book chapters, and has filed more than 25 patents. Andreia is a co-recipient of the ISSCC 2012 Jan Van Vessem Award for Outstanding European Paper and of the ISSCC 2013 Jack Kilby Award for Outstanding Student Paper; as well as winner of the 2012 STMicroelectronics Technology Council Innovation Prize. She is an elected member of the IEEE SSCS Adcom for the term January 2015 to December 2017.