Towards Chip-Scale Power Management: A Circuits Perspective

Topic: 
Towards Chip-Scale Power Management: A Circuits Perspective
Thursday, June 8, 2017 - 4:30pm to 5:30pm
Venue: 
Allen Extension Building: 101X Auditorium
Speaker: 
Jason T. Stauth, Assistant Professor of Engineering, Thayer School of Engineering at Dartmouth
Abstract / Description: 

Full integration of power management circuits has been a vision and a goal of the power electronics and integrated circuits communities for many years, if not decades. However, while exponential semiconductor scaling has had a profound impact on data processing, storage, and communications, the same has not been true for circuits that process and delivery energy. On one hand, this is because power delivery circuits are constrained by the size and efficiency of passive components – inductors and capacitors – and thus by Maxwell’s equations and fundamental material properties. Yet, a host of applications, spanning portable computing, IOT, automotive, and renewable energy demand small, lighter, cheaper, and more efficient solutions.

This talk will address some of the current trends relating to advances in active and passive components, as well as new circuit architectures and design paradigms that are positioned to open the pathway to mm-scale in monolithically-integrated power conversion. A particular focus will be on the switched capacitor approach – more specifically on switched capacitor circuits and architectures that can be operated in resonant modes or hybridized with a small inductive impedance. These circuits leverage the fundamental advantages of capacitors compared to inductors, such as much higher energy-density and better scalability. Yet, compared to a pure SC approach, the use of a small amount of magnetic energy storage can dramatically improve power-density, efficiency, and add capabilities for variable regulation.

The talk will present a generalized framework for comparison of arbitrary converter topologies based on a charge-multiplier approach. This will be used to highlight which topologies – some well-known, some yet to be explored – have good prospects for high-density integration. Several past integrated circuit prototypes will be highlighted that achieved records for efficiency and power density in bulk CMOS. 

Bio: 

Dr. Jason T. Stauth received the MS and PhD degrees from U.C. Berkeley in 2006 and 2008 respectively, where he studied high-frequency power and communication electronics including fully digital ISM-band power amplifiers. From 2000-2003, he designed mixed-signal sensor interface electronics at Allegro microsystems. He co-founded QVSense, Inc in 2008, and operated as CTO until its acquisition by Solar Semiconductor, Inc. Since 2011 he has been an Assistant Professor at Dartmouth College studying power and integrated electronics with a focus on high-density/frequency power management for applications spanning renewable energy, portable and performance computing, and electrified transportation. Dr. Stauth received the NSF Career Award in 2016.