Need for incorporation of security into next generation of microelectronics, improved economics of the platform-based design and advances in high level synthesis make efficient implementation of secure, complex SoCs possible. An opportunity exists to consider new approaches, tools, methodologies and IP that enable semi-automated and automatic approaches to assembly and integration that substantially improve SoC security. One path forward may be to develop a technology where secure, configurable, extensible, application-specific platforms can be used in conjunction with synthesis technology to automatically incorporate original functionality derived from an implementation-independent executable models as either hardware or software. Program concept for addressing this challenge at DARPA will be presented.
Mr. Serge Leef joined DARPA in August 2018 as a program manager in the Microsystems Technology Office (MTO). His research interests include computer architecture, simulation, synthesis, semiconductor intellectual property (IP), cyber-physical modeling, distributed systems, secure design flows, and supply chain management. He is also interested in the facilitation of startup ecosystems and business aspects of technology.
Leef came to DARPA from Mentor, a Siemens Business where from 2010 until 2018 he was a Vice President of New Ventures, responsible for identifying and developing technology and business opportunities in systems-oriented markets. Additionally, from 1999 to 2018, he served as a division General Manager, responsible for defining strategies and building successful businesses around design automation products in the areas of hardware/software co-design, multi-physics simulation, IP integration, SoC optimization, design data management, automotive/aerospace networking, cloud-based electronic design, Internet of Things (IoT) infrastructure, and hardware cybersecurity.
Prior to joining Mentor, he was responsible for design automation at Silicon Graphics, where he and his team created revolutionary, high-speed simulation tools to enable the design of high-speed 3D graphics chips, which defined the state-of-the-art in visualization, imaging, gaming, and special effects for a decade. Prior to that, he managed a CAE/CAD organization at Microchip and developed functional and physical design and verification tools for major 8- and 16-bit microcontroller and microprocessor programs at Intel.
Leef received his Bachelor of Science degree in electrical engineering and Master of Science degree in computer science from Arizona State University. He has served on corporate, state, and academic advisory boards, delivered numerous public speeches, and holds two patents.