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The emergence of different 3D technologies as well as Non-Volatile Resistive Memories (RRAM) opens up a new technology roadmap towards energy-efficient edge-circuits. This presentation will highlight recent key technological achievements performed at CEA-Leti in this field and will illustrate how both 3D and RRAMs can bring not only better performance but also new functionalities, especially for In-Memory-Computing and Artificial Intelligence dedicated circuits.
Dr. François Andrieu is the head of Laboratory “Nano-devices for Memory and Computing” at CEA-Leti, Grenoble, France. He received the M.Sc and Ph.D. degrees from the Grenoble INP, France in 2001 and 2005, respectively. He has been strongly involved in the development of the Fully-Depleted-Silicon-On-Insulator (FDSOI) CMOS technology at Leti and with STMicroelectronics, where he was assigned between 2012-2015 in the process-integration and technology-to-design groups. His fields of interest are: advanced CMOS transistors, stacked nanowires, 3D and 3D-sequential integration, NVM Resistive-RAM and In-Memory-Computing. He is currently serving as a TPC member of the IEDM, VLSI-TSA and SSDM conferences. He is the author or co-author of more than 34 patents, 240 conference abstracts or refereed journal articles, 11 invited papers and 3 book chapters. He received the IEEE senior grade in 2018, the European ERC consolidator grant in 2019 and the IEEE/SEE Brillouin award in 2018.
