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Staying on the Moore’s Law curve for the last 50 years has required every piece of equipment, manufacturing process, design methodology, and EDA tool be optimized first and foremost for high-volume/low-mix manufacturing. As we barrel towards a semiconductor manufacturing singularity (0 nm & infinite complexity), the industry will likely need to move away from high-volume/low-mix manufacturing towards built-to-order hyper specialized design and manufacturing approach. Achieving reasonable costs for low-volume manufacturing is a grand challenge requiring breakthroughs in materials, equipment, processes, standards, design methodology, architecture, and EDA tools. This talk will review successful attempts to reduce the barrier to bespoke silicon for startups and national security at Adapteva, DARPA, and Zero ASIC and conclude with recommendations for future development.
Andreas Olofsson is a 25 year silicon veteran and founder at Zero ASIC, a new startup on a mission to reduce the barrier to custom silicon. Andreas previously served as a program manager at DARPA where he created and managed national research programs in EDA, open source hardware, machine learning, parallel compilers, heterogeneous integration, and analog computing. Some of the successes coming out of his DARPA programs include Synopsys AMS emulation, and Cadence AI PCB design. the AIB standard, SHIP transition program, OpenRoad, OpenFPGA, Pono, Ilang, Magical (analog), Gemmini ML, ACT, and Black Parrot RISC-V processor. Previously, Andreas founded and managed Adapteva, where he created the Epiphany parallel processors and Parallella platform.
