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With current trends in CMOS technology scaling and increasing computing needs for machine learning, efficient computing is increasingly coming through architecture specialization. One impact of this architecture specialization, is a move from “general purpose programmability” to more specialized programming models, particularly with respect to memory. This talk will outline some of these trends and specifically highlight work within AMD to make NPU architectures more accessible through open source tools.
Stephen Neuendorffer is a Fellow in the AMD Research and Development Group working on programming methodologies for compute acceleration, focused on machine learning applications. Previously, he was product architect of Xilinx Vivado HLS, co-authored a widely used textbook on HLS design for FPGAs, and worked with customers on a wide variety of applications, including video encoders, computer vision, wireless systems, and networking systems. He received B.S. degrees in Electrical Engineering and Computer Science from the University of Maryland, College Park in 1998. He graduated with University Honors, Departmental Honors in Electrical Engineering, and was named the Outstanding Graduate in the Department of Computer Science. He received the Ph.D. degree from the University of California, Berkeley in 2005, after being one of the key architects of Ptolemy II.
